The present invention relates to a method for manufacturing a semiconductor device, and relates more specifically to a technology effective in being applied to a method for manufacturing a semiconductor device including an element isolation region.
As the structure of the element isolation region arranged in the main surface of a semiconductor substrate in order to electrically isolate plural regions (active regions) that respectively form the semiconductor element from each other in the main surface of the semiconductor substrate, STI (Shallow Trench Isolation), LOCOS (Local Oxidization of Silicon), and the like are known.
In Japanese Unexamined Patent Application Publication No. 2000-200878, a method for forming the element isolation region of the STI structure is described.